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SY75576L 267mhz 1:4 3.3v hcsl/lvds fanout buffer precisionedge? precision edge is a registered trademark of micrel, inc. micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944 - 0800 ? fax + 1 (408) 474 - 1000 ? http://www.micrel.com july 2 , 20 13 revision 1.0 hbwhelp@micrel.com or (408) 955 - 1690 general description the SY75576L is a high - speed, fully differential 1:4 clock fanout buffer optimized to provide four identical output copies with 137 fs phase jitter and maximum 50ps output - to - output skew. designed to be used with pci - express applications, SY75576L accepts and outputs hcsl or lvds logic levels. the SY75576L operates from a 3.3v 5% power supply and is guaranteed over the full industrial temperature r ange ( ? 40c to +85c). it is available in a 20 - pin tssop lead - free package. the SY75576L is part of micrels high - speed, ultra - low jitter, precisionedge? product line. datasheets and support documentation are available on micrels web site at : www.micrel.com . functional block diagram features ? four differential pairs of lvds or hcsl outputs ? two pairs of differential inputs accept lvds or hcsl logic levels ? 267mhz max hcsl frequency ? 100mhz max lvds frequency ? ultra low phase jitter: ? 137 fs rms , 200mhz ( 12k hz C 20mhz) ? 153 fs rms , 156.25mhz (12k hz C 20mhz) ? 212 fs rms , 100mhz (12k hz C 20mhz) ? < 2ps total_j itter pk - pk , 200mhz ( ber = 10 ? 12 ) ? 50ps o utput - to -o utput s kew ? 3.3v 5% power supply operation ? ? 40c to +85c operating temperature ? available in 20 - pin tssop lead - free package applications ? clock distribution ? pci - express ? servers ? switches ? routers downloaded from: http:///
micrel, inc. SY75576L july 2 , 20 13 2 revision 1.0 hbwhelp@micrel.com or (408) 955 - 1690 ordering information ( 1 ) part number package type operating range package marking lead finish SY75576L ky tssop- 20 industrial 75576l with pb - free bar - line indicator matte -sn SY75576L ky tr ( 2 ) tssop- 20 industrial 75576l with pb - free bar - line indicator matte -sn notes: 1. contact factory for die availability. dice are guaranteed at t a = 25c, dc electricals only. 2. tape and reel. pin configuration 20 -pin tssop downloaded from: http:///
micrel, inc. SY75576L july 2 , 20 13 3 revision 1.0 hbwhelp@micrel.com or (408) 955 - 1690 pin description pin number pin name pin function 1 sel sel = 0 pr opagates in2, /in2 to outputs. sel = 1 propagates in1, /in1 to outputs. internal pull - up resistor , in1, /in1 is selected by default. 2 vddin 3.3 v power supply 3 in1 hcsl/lvds input 1 4 /in1 hcsl/lvds inverted input 1 5 /pd pd = 0 powers down the chip and tri - states outputs. the pin is attached to an internal pull - up resistor. 6 in2 hcsl/lvds input 2 7 /in2 hcsl/lvds inverted input 2 8 oe tri - state outputs. hi gh = enable outputs . low = disable outputs. inter nal pull - up resistor, outputs are enabled by default. 9 gnd ground 10 iref external resistor rref between pin iref and gnd controls reference current 11 /clkd inverted output d 12 clkd non - inverted output d 13 /clkc inverted output c 14 clkc non - inverted output c 15 vdd 3.3v power supply 16 gnd ground 17 /clkb inverted output b 18 clkb non - inverted output b 19 /clka inverted output a 20 clka non - inverted output a clock input function table sel input pair 0 2in/2in 1 1in/1in downloaded from: http:///
micrel, inc. SY75576L july 2 , 20 13 4 revision 1.0 hbwhelp@micrel.com or (408) 955 - 1690 absolute maximum ratings ( 3 ) supply voltage (v dd, v ddin ) ........................................... 5.5v input voltage (v in ) .............................. C 0.5v to v ddin + 0.5v lead temperature (soldering, 20s) ............................ 260c maximum junction temperature ................................ 125 c storage temperature (t s ) ......................... C 65c to +150 c esd p rotection (input) ....................................... 2000v min. operating ratings ( 4 ) supply voltage (v dd, v ddin ) ...................... 3.135v to 3.465v ambient op temperature (t a ) .................... ? 40c to +85c package thermal resistance ( 5 ) tssop still - air ( ja ) ................................................. 93c/w junction - to - case ( jc ) ................................ . 20c/w dc electrical characteristics ( 6 ) v dd = v ddin = 3.135v to 3.465v, t a = ? 40c to +85c, unless otherwise stated. rref = 475 symbol parameter condition min . typ . max . units v dd, v ddin power supply voltage range 3.135 3.3 3.465 v c in input capacitance 7 pf c out output capacitance 6 pf l pin pin inductance 5 nh r out output r esistance 3 k r pull up pull up resistance sel, /pd, oe 110 k v ih input high voltage sel, /pd, oe 2 v ddin + 0.3 v v il input low voltage sel, /pd, oe ? 0.3 0.8 v v ih input high voltage hcsl, in, /in 660 750 850 v v il input low voltage hcsl, in, /in ? 150 0 v v in differential input voltage range lvds, in, /in 250 350 550 mv v input offset input c ommon m ode v oltage lvds, in, /in, 1.125 1.25 1.375 v v oh output high voltage hscl 660 750 850 mv v ol output low voltage hscl ? 150 0 27 mv vcross ( 7 , 8 ) crossing point v oltage absolute 250 350 550 mv vcross_variation ( 7 , 8 , 9 ) variation of crossing point v oltage variation over all edges 140 mv i dd power supply current for v dd + v ddin 50 , 2 pf 75 90 ma no load, /pd = low 0.4 ma oe = logic low 20 ma i il ( 10 ) input leakage current 0 < v in < v ddin ? 5 5 a notes: 3. permanent device damage may occur if absolute maximum ratings are exceede d. this is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this datas heet. exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 4. the data s heet limits are not guaranteed if the device is operated beyond the operating ratings. 5. package thermal resistance assumes that the exposed pad is soldered (or equivalent) to the device's most negative potential on the pcb. jb and ja values are determined for a 4 - layer board in still - air u nless otherwise stated. the circuit is designed to meet the dc specifications sh own in the above table after thermal equilibrium has been established. 6. the circuit is designed to meet the dc specifications shown in the above table after therm al equilibrium has been established. 7. test setup is r l = 50 with 2pf, rr = 475 1%. 8. measurement taken from q and /q . 9. measured at the crossing point where instantaneous voltages of clk and /clk are equal. 10. inputs with pull - up/pull - down resistances are not included. downloaded from: http:///
micrel, inc. SY75576L july 2 , 20 13 5 revision 1.0 hbwhelp@micrel.com or (408) 955 - 1690 ac electrical characteristics ( 6 ) v dd = v ddin = 3.135v to 3.465v, t a = ? 40c to +85c, unless otherwise stated. symbol parameter condition min. typ. max. units f max maximum frequency hcsl termination 267 mhz lvds termination 100 mhz t pd propagation delay note 11 2 ns t skew output - to - output skew note s 12 , 13 50 ps t r , t f output rise/fall times 0.175v to 0.525v / 0.525v to 0.175v at full output swing. 50 , 2pf 175 338 700 ps t r/f_var rise/fall time variation at full output swing. 50 , 2pf 125 ps t rj_jitter phase jitter at 200mhz 137 fs rms at 156.25mhz 153 fs rms at 100mhz 212 fs rms t tj_jitter total jitter ber = 10 - 12 , t dj = 0, at 200mhz 2 ps t oe_enable output enable time all outputs 2 s t oe_disable output disable time all outputs 10 ns t dcy duty cycle 45 50 55 % notes: 11. measured from the differential input crossing point to the differential output crossing poin t. 12. output - to - output skew is the difference in time between outputs, receiving data from the same input, fo r the same temperature, voltage , and transition. 13. this parameter is defined in accordance with jedec standard 65 . jitter analysis jitter is defined as the deviation of a signal from its ideal position . p hase noise is the presence of signal energy at frequencies other than the carrier. random jitter has a gaussian distribution and is specified as an rms unit , which is one standard deviation of the distribution. since gaussian distribution is unbounded in an infinite sample, no communication system can be completely error free. instead, communication links are rated with a maximum bit error rate (ber), which is typically around 10 - 12 for high - speed communication equipment. a chiev ing a desired ber requires account ing for a number of standard deviations of random noise by using the appropriate value for n (see table 1 ) in the formula in equation 1. tj = n rj + dj eq. 1 where tj is total jitter, rj is random jitter, and dj is deterministic jitter. if routing clock signals, the deterministic jitter is usually negligible and the tj is dominated by the random jitter. calculating tj from rj using equation 1 gives the values in table 1 . table 1 . standard deviations of random noise ber n r j at 200mhz t j at 200mhz 10 - 10 12.723 137fs_rms 1.743ps 10 - 11 13.412 137 fs_rms 1.837ps 10 - 12 14.069 137 fs_rms 1.927ps 10 - 13 14.698 137 fs_rms 2.013ps downloaded from: http:///
micrel, inc. SY75576L july 2 , 20 13 6 revision 1.0 hbwhelp@micrel.com or (408) 955 - 1690 phase noise plots phase jitter = 137fs rms , 200mhz carrier frequency ; integration range: 12khz C 20mhz downloaded from: http:///
micrel, inc. SY75576L july 2 , 20 13 7 revision 1.0 hbwhelp@micrel.com or (408) 955 - 1690 phase jitter = 153fs rms , 156.25 mhz carrier frequency ; integration range: 12khz C 20mhz downloaded from: http:///
micrel, inc. SY75576L july 2 , 20 13 8 revision 1.0 hbwhelp@micrel.com or (408) 955 - 1690 phase jitter = 212 fs rms , 1 00mhz carrier frequency ; integration range: 12khz C 20mhz downloaded from: http:///
micrel, inc. SY75576L july 2 , 20 13 9 revision 1.0 hbwhelp@micrel.com or (408) 955 - 1690 functional characteristics hcsl waveform diagram hcsl interface application pci - express device routing rs = 33 rt = 50 downloaded from: http:///
micrel, inc. SY75576L july 2 , 20 13 10 revision 1.0 hbwhelp@micrel.com or (408) 955 - 1690 lvds waveform diagram lvds interface application r1 = 33 r2 = 17 5 r3 = 140 r4 = 100 downloaded from: http:///
micrel, inc. SY75576L july 2 , 20 13 11 revision 1.0 hbwhelp@micrel.com or (408) 955 - 1690 package information ( 14 ) 20 - pin tssop note: 14. package information is correct as of the publication date. for updates and most current i nformation, go to www.micrel.com . micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944 - 0800 fax +1 (408) 474 - 1000 web http://www.micrel.com micrel makes no representations or warranties with respect to the accuracy or co mpleteness of the information furnish ed in this data sheet. this information is not intended as a warranty and micrel does not assume responsibility for its use. micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. no license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in micrels terms and conditions of sale for such products, mic rel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use o f micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any pat ent, copyright or other intellectual property righ t. micrel products are not designed or authorized for use as components in life support appliances , devices or systems where malfunction of a product can reasonably be expected to result in personal injury. life support devices or systems are device s or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expect ed to result in a significant injury to the user. a purchasers use or sale of micrel products for use in life support appliances, devic es or systems is a purchasers own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 20 13 micrel, incorporated. downloaded from: http:///

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